RapidStream TAPA Documentation
Welcome to the RapidStream TAPA documentation. RapidStream TAPA is a powerful framework for designing high-frequency FPGA dataflow accelerators. It combines a robust C++ API for expressing task-parallel designs with advanced optimization techniques from RapidStream to deliver exceptional design performance and productivity.
This documentation is divided into two main sections: User Documentation for those using TAPA to develop FPGA accelerators, and Developer Documentation for those contributing to or extending the TAPA framework itself.
- Flexible Interaction with Streams
- More on Defining Tasks
- Less Repetitive Code with Stream/MMAP Array
- Flexible Memory Access
- The Programming Model of
async_mmap
- Basic Usage of
async_mmap
- Runtime Burst Detection
- Smaller Area Overhead
- Sharing External Memory Interfaces
- Example 1: Multi-Outstanding Random Memory Accesses
- Example 2: Sequential Read from
async_mmap
into an Array - Example 3: Sequential Write into
async_mmap
from a FIFO - Example 4: Simultaneous Read and Write to
async_mmap
- The Programming Model of